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MICRO
2005
IEEE
130views Hardware» more  MICRO 2005»
15 years 5 months ago
Exploiting Vector Parallelism in Software Pipelined Loops
An emerging trend in processor design is the addition of short vector instructions to general-purpose and embedded ISAs. Frequently, these extensions are employed using traditiona...
Samuel Larsen, Rodric M. Rabbah, Saman P. Amarasin...
106
Voted
ICASSP
2011
IEEE
14 years 3 months ago
Online Kernel SVM for real-time fMRI brain state prediction
The Support Vector Machine (SVM) methodology is an effective, supervised, machine learning method that gives stateof-the-art performance for brain state classification from funct...
Yongxin Taylor Xi, Hao Xu, Ray Lee, Peter J. Ramad...
92
Voted
VLSID
2009
IEEE
155views VLSI» more  VLSID 2009»
16 years 7 days ago
Unified Challenges in Nano-CMOS High-Level Synthesis
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...
Saraju P. Mohanty
COLT
2008
Springer
15 years 1 months ago
Adapting to a Changing Environment: the Brownian Restless Bandits
In the multi-armed bandit (MAB) problem there are k distributions associated with the rewards of playing each of k strategies (slot machine arms). The reward distributions are ini...
Aleksandrs Slivkins, Eli Upfal
COR
2007
106views more  COR 2007»
14 years 11 months ago
On a stochastic sequencing and scheduling problem
We present a framework for solving multistage pure 0–1 programs for a widely used sequencing and scheduling problem with uncertainty in the objective function coefficients, the...
Antonio Alonso-Ayuso, Laureano F. Escudero, M. Ter...