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140
Voted
ISCA
1996
IEEE
15 years 6 months ago
1996
IEEE
Memory latency is an important bottleneck in system performance that cannot be adequately solved by hardware alone. Several promising software techniques have been shown to addres...
137
Voted
EACL
2009
ACL Anthology
15 years 9 days ago
2009
ACL Anthology
like text summarisation requires a means of producing novel summary sentences. In order to improve the grammaticality of the generated sentence, we model a global (sentence) level...
172
Voted
WMPI
2004
ACM
15 years 8 months ago
2004
ACM
Abstract. The large and growing impact of memory hierarchies on overall system performance compels designers to investigate innovative techniques to improve memory-system efficienc...
128
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ICDAR
2003
IEEE
15 years 7 months ago
2003
IEEE
This paper deals with performance evaluation of rasterto-vector conversion algorithms. We briefly review the past work, and focus our attention on a method proposed by Phillips a...
128
Voted
TCOM
2011
14 years 9 months ago
2011
—Low-density parity-check (LDPC) codes are gaining interest for high data rate applications in both terrestrial and spatial communications. They can be designed and studied throu...