This paper presents a modular optimization framework for custom digital circuits in the power – performance space. The method uses a static timer and a nonlinear optimizer to max...
This paper studies the impact of variability on the noise robustness of logic gates using noise rejection curves (NRCs). NRCs allow noise pulses to be modeled using magnitude-dura...
This paper proposes a yield optimization method for standard-cells under timing constraints. Yield-aware logic synthesis and physical optimization require yield-enhanced standard ...
Optimizing combinations of placements of parts, known as markers, is an important preparatory step in order-based industrial production of clothes. Given a work order in the form ...
Transforming software requirements into a software design involves the iterative partition of a solution into software components. The process is human-intensive and does not guar...