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» Optimizing Logic Design Using Boolean Transforms
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CASES
2008
ACM
14 years 11 months ago
Control flow optimization in loops using interval analysis
We present a novel loop transformation technique, particularly well suited for optimizing embedded compilers, where an increase in compilation time is acceptable in exchange for s...
Mohammad Ali Ghodrat, Tony Givargis, Alex Nicolau
SAT
2007
Springer
95views Hardware» more  SAT 2007»
15 years 3 months ago
Solving Multi-objective Pseudo-Boolean Problems
Integer Linear Programs are widely used in areas such as routing problems, scheduling analysis and optimization, logic synthesis, and partitioning problems. As many of these proble...
Martin Lukasiewycz, Michael Glaß, Christian ...
DAC
2009
ACM
15 years 10 months ago
Timing-driven optimization using lookahead logic circuits
This paper describes a function-based timing-driven optimization technique for the synthesis of multi-level logic circuits. Motivated by the principles of parallel prefix computat...
Mihir R. Choudhury, Kartik Mohanram
DATE
2005
IEEE
176views Hardware» more  DATE 2005»
15 years 3 months ago
Effective Lower Bounding Techniques for Pseudo-Boolean Optimization
Linear Pseudo-Boolean Optimization (PBO) is a widely used modeling framework in Electronic Design Automation (EDA). Due to significant advances in Boolean Satisfiability (SAT), ...
Vasco M. Manquinho, João P. Marques Silva
CF
2008
ACM
14 years 11 months ago
Exact combinational logic synthesis and non-standard circuit design
Using a new exact synthesizer that automatically induces minimal universal boolean function libraries, we introduce two indicators for comparing their expressiveness: the first ba...
Paul Tarau, Brenda Luderman