868 search results - page 125 / 174 » Optimizing Logic Design Using Boolean Transforms |
ICCAD
1996
IEEE
15 years 1 months ago
1996
IEEE
State justification is a time-consuming operation in test generation for sequential circuits. In this paper, we present a technique to rapidly identify state elements (flip-flops)...
97
Voted
IJCV
2007
14 years 9 months ago
2007
Orthogonal and biorthogonal wavelets became very popular image processing tools but exhibit major drawbacks, namely a poor resolution in orientation and the lack of translation inv...
ASPDAC
2007
ACM
15 years 1 months ago
2007
ACM
In a realistic design flow, circuit and system optimizations must interact with physical aspects of the design. For example, improvements in timing and power may require replacing ...
73
Voted
FUZZIEEE
2007
IEEE
15 years 4 months ago
2007
IEEE
—In this paper, we propose a new nonlinear classier based on a generalized Choquet integral with signed fuzzy measures to enhance the classification power by capturing all possib...
ICCAD
2009
IEEE
14 years 7 months ago
2009
IEEE
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...