868 search results - page 128 / 174 » Optimizing Logic Design Using Boolean Transforms |
ISCAS
2006
IEEE
15 years 3 months ago
2006
IEEE
– Increasing logic densities and clock frequencies on FPGAs lead to rapid increase in power density, which translates to higher on-chip temperature. In this paper, we investigate...
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PLDI
2010
ACM
15 years 2 months ago
2010
ACM
Dynamic correctness checking tools (a.k.a. lifeguards) can detect a wide array of correctness issues, such as memory, security, and concurrency misbehavior, in unmodified executa...
VLSID
2009
IEEE
15 years 10 months ago
2009
IEEE
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...
GECCO
2006
Springer
15 years 1 months ago
2006
Springer
In this article, we describe the application of an enhanced genetic algorithm to the problem of hardware-software codesign. Starting from a source code written in a high-level lan...
ISVLSI
2002
IEEE
15 years 2 months ago
2002
IEEE
An Early Completion technique is developed to significantly increase the throughput of NULL Convention self-timed digital systems without impacting latency or compromising their s...