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» Optimizing Logic Design Using Boolean Transforms
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DAC
2004
ACM
15 years 10 months ago
Dynamic FPGA routing for just-in-time FPGA compilation
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...
Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan
91
Voted
PLDI
2004
ACM
15 years 3 months ago
KISS: keep it simple and sequential
The design of concurrent programs is error-prone due to the interaction between concurrently executing threads. Traditional automated techniques for finding errors in concurrent ...
Shaz Qadeer, Dinghao Wu
ASPDAC
2008
ACM
154views Hardware» more  ASPDAC 2008»
14 years 11 months ago
Exploring high-speed low-power hybrid arithmetic units at scaled supply and adaptive clock-stretching
Meeting power and performance requirement is a challenging task in high speed ALUs. Supply voltage scaling is promising because it reduces both switching and active power but it al...
Swaroop Ghosh, Kaushik Roy
95
Voted
CASES
2006
ACM
15 years 1 months ago
Efficient architectures through application clustering and architectural heterogeneity
Customizing architectures for particular applications is a promising approach to yield highly energy-efficient designs for embedded systems. This work explores the benefits of arc...
Lukasz Strozek, David Brooks
FOAL
2007
ACM
15 years 1 months ago
On the relation of aspects and monads
The relation between aspects and monads is a recurring topic in discussions in the programming language community, although it has never been elaborated whether their resemblences...
Christian Hofer, Klaus Ostermann