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» Optimizing Logic Design Using Boolean Transforms
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DAC
1994
ACM
15 years 1 months ago
Statistical Delay Modeling in Logic Design and Synthesis
Manufacturing disturbances are inevitable in the fabrication of integrated circuits. These disturbances will result in variations in the delay speci cations of manufactured circui...
Horng-Fei Jyu, Sharad Malik
POPL
2004
ACM
15 years 10 months ago
Incremental execution of transformation specifications
We aim to specify program transformations in a declarative style, and then to generate executable program transformers from such specifications. Many transformations require non-t...
Ganesh Sittampalam, Oege de Moor, Ken Friis Larsen
CVPR
2008
IEEE
15 years 11 months ago
Exact inference in multi-label CRFs with higher order cliques
This paper addresses the problem of exactly inferring the maximum a posteriori solutions of discrete multi-label MRFs or CRFs with higher order cliques. We present a framework to ...
Srikumar Ramalingam, Pushmeet Kohli, Karteek Alaha...
CASES
2000
ACM
15 years 2 months ago
A code generation framework for Java component-based designs
In this paper, we describe a software architecture supporting code generation from within Ptolemy II. Ptolemy II is a componentbased design tool intended for embedded and real-tim...
Jeff Tsay, Christopher Hylands, Edward Lee
73
Voted
DAC
2008
ACM
15 years 10 months ago
Predictive design space exploration using genetically programmed response surfaces
Exponential increases in architectural design complexity threaten to make traditional processor design optimization techniques intractable. Genetically programmed response surface...
Henry Cook, Kevin Skadron