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» Optimizing Logic Design Using Boolean Transforms
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ISCAS
2006
IEEE
94views Hardware» more  ISCAS 2006»
15 years 3 months ago
On the sensitivity of BDDs with respect to path-related objective functions
— Reduced ordered Binary Decision Diagrams (BDDs) are a data structure for efficient representation and manipulation of Boolean functions. They are frequently used in logic synt...
Rüdiger Ebendt, Rolf Drechsler
FCCM
2006
IEEE
162views VLSI» more  FCCM 2006»
15 years 3 months ago
Power Visualization, Analysis, and Optimization Tools for FPGAs
This paper introduces the Low-Power Intelligent Tool Environment (LITE), an object oriented tool set designed for power visualization, analysis, and optimization. These tools lever...
Matthew French, Li Wang, Michael J. Wirthlin
VLDB
2007
ACM
104views Database» more  VLDB 2007»
15 years 10 months ago
Inverse Functions in the AquaLogic Data Services Platform
When integrating data from heterogeneous sources, it is often necessary to transform both the schemas and the data from the underlying sources in order to present the integrated d...
Nicola Onose, Vinayak R. Borkar, Michael J. Carey
FPL
2006
Springer
219views Hardware» more  FPL 2006»
15 years 1 months ago
FPGA Implementations of the DES and Triple-DES Masked Against Power Analysis Attacks
This paper presents FPGA implementations of the DES and Triple-DES with improved security against power analysis attacks. The proposed designs use Boolean masking, a previously in...
François-Xavier Standaert, Gaël Rouvro...
DAC
2003
ACM
15 years 10 months ago
Large-scale SOP minimization using decomposition and functional properties
In some cases, minimum Sum-Of-Products (SOP) expressions of Boolean functions can be derived by detecting decomposition and observing the functional properties such as unateness, ...
Alan Mishchenko, Tsutomu Sasao