868 search results - page 56 / 174 » Optimizing Logic Design Using Boolean Transforms |
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WCRE
1997
IEEE
15 years 1 months ago
1997
IEEE
Reverse Engineering is focused on the challenging task of understanding legacy program code without having suitable documentation. Using a transformational forward engineering per...
DAC
1995
ACM
15 years 1 months ago
1995
ACM
- We introduce a transformation, named rephasing, that manipulates the timing parameters in control-dataflow graphs. Traditionally high-level synthesis systems for DSP have either ...
DAC
2001
ACM
15 years 10 months ago
2001
ACM
This work presents a new and computationally efficient performance optimization technique for distributed RLC interconnects based on a rigorous delay computation scheme. The new o...
ICCAD
2006
IEEE
15 years 6 months ago
2006
IEEE
Soft errors in logic are emerging as a significant reliability problem for VLSI designs. This paper presents novel circuit optimization techniques to mitigate soft error rates (SE...
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ICCAD
2002
IEEE
15 years 6 months ago
2002
IEEE
Optimized solvers for the Boolean Satisfiability (SAT) problem have many applications in areas such as hardware and software verification, FPGA routing, planning, etc. Further use...