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» Optimizing Logic Design Using Boolean Transforms
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80
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ASPDAC
2001
ACM
94views Hardware» more  ASPDAC 2001»
15 years 1 months ago
On speeding up extended finite state machines using catalyst circuitry
We propose a timing optimization technique for a complex finite state machine that consists of not only random logic but also data operators. In such a design, the timing critical...
Shi-Yu Huang
82
Voted
CGO
2005
IEEE
15 years 3 months ago
A General Compiler Framework for Speculative Optimizations Using Data Speculative Code Motion
Data speculative optimization refers to code transformations that allow load and store instructions to be moved across potentially dependent memory operations. Existing research w...
Xiaoru Dai, Antonia Zhai, Wei-Chung Hsu, Pen-Chung...
68
Voted
ENTCS
2006
176views more  ENTCS 2006»
14 years 9 months ago
Automatic Formal Synthesis of Hardware from Higher Order Logic
A compiler that automatically translates recursive function definitions in higher order logic to clocked synchronous hardware is described. Compilation is by mechanised proof in t...
Mike Gordon, Juliano Iyoda, Scott Owens, Konrad Sl...
86
Voted
CL
2000
Springer
15 years 2 months ago
Modelling Digital Circuits Problems with Set Constraints
A number of diagnostic and optimisation problems in Electronics Computer Aided Design have usually been handled either by specific tools or by mapping them into a general problem s...
Francisco Azevedo, Pedro Barahona
66
Voted
ICLP
1989
Springer
15 years 1 months ago
A Simple Code Improvement Scheme for Prolog
The generation of efficient code for Prolog programs requires sophisticated code transformation and optimization systems. Much of the recent work in this area has focussed on hig...
Saumya K. Debray