868 search results - page 65 / 174 » Optimizing Logic Design Using Boolean Transforms |
107
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TACAS
2010
Springer
14 years 7 months ago
2010
Springer
Abstract. We extend the setting of Satisfiability Modulo Theories (SMT) by introducing a theory of costs C, where it is possible to model and reason about resource consumption and ...
101
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DATE
2000
IEEE
15 years 2 months ago
2000
IEEE
Pass Transistor Logic has attracted more and more interest during last years, since it has proved to be an attractive alternative to static CMOS designs with respect to area, perf...
ISLPED
2009
ACM
15 years 4 months ago
2009
ACM
Many techniques for power management employed in advanced RTL synthesis tools rely explicitly or implicitly on observability don’t-care (ODC) conditions. In this paper we presen...
ICLP
1997
Springer
15 years 1 months ago
1997
Springer
We provide a method whereby, given mode and (upper approximation) type information, we can detect procedures and goals that can be guaranteed to not fail (i.e., to produce at leas...
ICSE
2001
IEEE-ACM
15 years 2 months ago
2001
IEEE-ACM
Mocha is a model checker based on the theme of exploiting design modularity: instead of manipulating unstructured state-transition graphs, it supports the hierarchical modeling fra...