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» Optimizing Logic Design Using Boolean Transforms
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SIGMOD
2006
ACM
116views Database» more  SIGMOD 2006»
15 years 10 months ago
Extensible optimization in overlay dissemination trees
We introduce XPORT, a profile-driven distributed data dissemination system that supports an extensible set of data types, profile types, and optimization metrics. XPORT efficientl...
Olga Papaemmanouil, Yanif Ahmad, Ugur Çetin...
FPL
2007
Springer
190views Hardware» more  FPL 2007»
15 years 3 months ago
Automatic Accuracy-Guaranteed Bit-Width Optimization for Fixed and Floating-Point Systems
In this paper we present Minibit+, an approach that optimizes the bit-widths of fixed-point and floating-point designs, while guaranteeing accuracy. Our approach adopts differen...
William G. Osborne, Ray C. C. Cheung, José ...
DAC
2007
ACM
15 years 10 months ago
On-The-Fly Resolve Trace Minimization
The ability of modern SAT solvers to produce proofs of unsatisfiability for Boolean formulas has become a powerful tool for EDA applications. Proofs are generated from a resolve t...
Ohad Shacham, Karen Yorav
ICCAD
2009
IEEE
119views Hardware» more  ICCAD 2009»
14 years 7 months ago
Iterative layering: Optimizing arithmetic circuits by structuring the information flow
Current logic synthesis techniques are ineffective for arithmetic circuits. They perform poorly for XOR-dominated circuits, and those with a high fan-in dependency between inputs ...
Ajay K. Verma, Philip Brisk, Paolo Ienne
DAC
1999
ACM
15 years 2 months ago
A Two-State Methodology for RTL Logic Simulation
This paper describes a two-state methodology for register transfer level (RTL) logic simulation in which the use of the Xstate is completely eliminated inside ASIC designs. Exampl...
Lionel Bening