868 search results - page 88 / 174 » Optimizing Logic Design Using Boolean Transforms |
PLDI
2003
ACM
15 years 3 months ago
2003
ACM
This paper presents the design and implementation of a compiler algorithm that effectively optimizes programs for energy usage using dynamic voltage scaling (DVS). The algorithm ...
GLVLSI
2007
IEEE
15 years 4 months ago
2007
IEEE
We propose an interconnect reorganization algorithm for reduction stages in parallel multipliers. It aims at minimizing power consumption for given static probabilities at the pri...
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ISVLSI
2006
IEEE
15 years 3 months ago
2006
IEEE
Power consumption has been the primary issue in processor design, with various power reduction strategies being adopted from system-level to circuitlevel. In order to develop a po...
ASPDAC
2000
ACM
15 years 2 months ago
2000
ACM
Symbolic debuggers are system development tools that can accelerate the validation speed of behavioral specifications by allowing a user to interact with an executing code at the ...
ARITH
2009
IEEE
15 years 4 months ago
2009
IEEE
Moduli of the form 2n ± 1, which greatly simplify certain arithmetic operations in residue number systems (RNS), have been of longstanding interest. A steady stream of designs fo...