868 search results - page 8 / 174 » Optimizing Logic Design Using Boolean Transforms |
ICCAD
1996
IEEE
15 years 1 months ago
1996
IEEE
This paper presents a new framework for formal logic verification. What is depicted here is fundamentally different from previous approaches. In earlier approaches, the circuit is ...
LPAR
2005
Springer
15 years 3 months ago
2005
Springer
Separation logic is a subset of the quantifier-free first order logic. It has been successfully used in the automated verification of systems that have large (or unbounded) inte...
ICCAD
1997
IEEE
15 years 1 months ago
1997
IEEE
High-level power estimation, when given only a high-level design specification such as a functional or RTL description, requires high-level estimation of the circuit average acti...
SAT
2005
Springer
15 years 3 months ago
2005
Springer
Advances in SAT solver technology have enabled many automated analysis and reasoning tools to reduce their input problem to a SAT problem, and then to use an efficient SAT solver ...
DATE
2004
IEEE
15 years 1 months ago
2004
IEEE
We propose an algorithm for efficient threshold network synthesis of arbitrary multi-output Boolean functions. The main purpose of this work is to bridge the wide gap that currentl...