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» Optimizing Logic Design Using Boolean Transforms
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TC
2002
14 years 9 months ago
Architectures and VLSI Implementations of the AES-Proposal Rijndael
Two architectures and VLSI implementations of the AES Proposal, Rijndael, are presented in this paper. These alternative architectures are operated both for encryption and decrypti...
Nicolas Sklavos, Odysseas G. Koufopavlou
CTRSA
2005
Springer
108views Cryptology» more  CTRSA 2005»
15 years 3 months ago
A Systematic Evaluation of Compact Hardware Implementations for the Rijndael S-Box
This work proposes a compact implementation of the AES S-box using composite field arithmetic in GF(((22 ) 2 ) 2 ). It describes a systematic exploration of different choices for...
Nele Mentens, Lejla Batina, Bart Preneel, Ingrid V...
FLAIRS
2007
15 years 2 days ago
Handling Qualitative Preferences Using Normal Form Functions
Reasoning about preferences is a major issue in many decision making problems. Recently, a new logic for handling preferences, called Qualitative Choice Logic (QCL), was presented...
Salem Benferhat, Daniel Le Berre, Karima Sedki
SIGMOD
2009
ACM
291views Database» more  SIGMOD 2009»
15 years 10 months ago
Partial join order optimization in the paraccel analytic database
The ParAccel Analytic DatabaseTM is a fast shared-nothing parallel relational database system with a columnar orientation, adaptive compression, memory-centric design, and an enha...
Yijou Chen, Richard L. Cole, William J. McKenna, S...
FPGA
2008
ACM
184views FPGA» more  FPGA 2008»
14 years 11 months ago
Mapping for better than worst-case delays in LUT-based FPGA designs
Current advances in chip design and manufacturing have allowed IC manufacturing to approach the nanometer range. As the feature size scales down, greater variability is experience...
Kirill Minkovich, Jason Cong