363 search results - page 45 / 73 » Optimizing Memory Accesses For Spatial Computation |
91
Voted
PODC
2010
ACM
15 years 1 months ago
2010
ACM
Concurrent collection classes are widely used in multi-threaded programming, but they provide atomicity only for a fixed set of operations. Software transactional memory (STM) pr...
PC
2007
14 years 9 months ago
2007
The Sony–Toshiba–IBM Cell Broadband Engine (Cell/B.E.) is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD co-process...
87
Voted
IWOMP
2009
Springer
15 years 2 months ago
2009
Springer
Abstract. Exploiting the full computational power of current hierarchical multiprocessor machines requires a very careful distribution of threads and data among the underlying non-...
DAC
2002
ACM
15 years 10 months ago
2002
ACM
Previous work on DRAM power-mode management focused on hardware-based techniques and compiler-directed schemes to explicitly transition unused memory modules to low-power operatin...
126
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IPPS
1995
IEEE
15 years 1 months ago
1995
IEEE
This paper describes improvements to the Mach microkernel’s support for efficient application startup across multiple nodes in a cluster or massively parallel processor. Signifi...