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» Optimizing Technology Mapping for FPGAs Using CAMs
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DATE
2010
IEEE
183views Hardware» more  DATE 2010»
15 years 4 months ago
Monolithically stackable hybrid FPGA
— The paper introduces novel field programmable gate array (FPGA) circuits based on hybrid CMOS/resistive switching device (memristor) technology and explores several logic archi...
Dmitri Strukov, Alan Mishchenko
SIGIR
2012
ACM
13 years 2 months ago
TFMAP: optimizing MAP for top-n context-aware recommendation
In this paper, we tackle the problem of top-N context-aware recommendation for implicit feedback scenarios. We frame this challenge as a ranking problem in collaborative filterin...
Yue Shi, Alexandros Karatzoglou, Linas Baltrunas, ...
ISCAS
2005
IEEE
122views Hardware» more  ISCAS 2005»
15 years 5 months ago
Towards a rigorous formulation of the space mapping technique for engineering design
—This paper deals with the Space Mapping (SM) approach to engineering design optimization. We attempt here a theoretical justification of methods that have already proven efficie...
Slawomir Koziel, John W. Bandler, Kaj Madsen
FCCM
2006
IEEE
108views VLSI» more  FCCM 2006»
15 years 5 months ago
A Reconfigurable Distributed Computing Fabric Exploiting Multilevel Parallelism
This paper presents a novel reconfigurable data flow processing architecture that promises high performance by explicitly targeting both fine- and course-grained parallelism. This...
Charles L. Cathey, Jason D. Bakos, Duncan A. Buell
TC
2008
14 years 11 months ago
High-Performance Designs for Linear Algebra Operations on Reconfigurable Hardware
Numerical linear algebra operations are key primitives in scientific computing. Performance optimizations of such operations have been extensively investigated. With the rapid adva...
Ling Zhuo, Viktor K. Prasanna