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» Optimizing Technology Mapping for FPGAs Using CAMs
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FCCM
2002
IEEE
174views VLSI» more  FCCM 2002»
15 years 2 months ago
PAM-Blox II: Design and Evaluation of C++ Module Generation for Computing with FPGAs
This paper explores the implications of integrating flexible module generation into a compiler for FPGAs. The objective is to improve the programmabilityof FPGAs, or in other wor...
Oskar Mencer
ICCAD
2004
IEEE
158views Hardware» more  ICCAD 2004»
15 years 6 months ago
DAOmap: a depth-optimal area optimization mapping algorithm for FPGA designs
In this paper we study the technology mapping problem for FPGA architectures to minimize chip area, or the total number of lookup tables (LUTs) of the mapped design, under the chi...
Deming Chen, Jason Cong
FPGA
2008
ACM
151views FPGA» more  FPGA 2008»
14 years 11 months ago
Beyond the arithmetic constraint: depth-optimal mapping of logic chains in LUT-based FPGAs
Look-up table based FPGAs have migrated from a niche technology for design prototyping to a valuable end-product component and, in some cases, a replacement for general purpose pr...
Michael T. Frederick, Arun K. Somani
DELTA
2006
IEEE
15 years 1 months ago
Using Design Patterns to Overcome Image Processing Constraints on FPGAs
The mapping of image processing algorithms to hardware is complicated by several hardware constraints including limited processing time, limited access to data and limited resourc...
K. T. Gribbon, Donald G. Bailey, Christopher T. Jo...
DAC
2000
ACM
15 years 10 months ago
Depth optimal incremental mapping for field programmable gate arrays
In this paper, we study the incremental t echnology mapping problem for lookup-table (LUT) based Field Programmable Gate Arrays (FPGAs) under incremental changes. Given a gate-lev...
Jason Cong, Hui Huang