194 search results - page 6 / 39 » Optimizing Technology Mapping for FPGAs Using CAMs |
ICCAD
2006
IEEE
15 years 6 months ago
2006
IEEE
This work describes a new mapping technique, RAM-MAP, that identifies parts of circuits that can be efficiently mapped into the synchronous embedded memories found on field prog...
DAC
2004
ACM
15 years 10 months ago
2004
ACM
Power optimization is of growing importance for FPGAs in nanometer technologies. Considering dual-Vdd technique, we show that configurable power supply is required to obtain a sat...
FPL
2004
Springer
15 years 2 months ago
2004
Springer
Abstract. Function evaluation is at the core of many compute-intensive applications which perform well on reconfigurable platforms. Yet, in order to implement function evaluation ...
VLSI
2005
Springer
15 years 3 months ago
2005
Springer
Quasi delay insensitive circuits are functionally independent of delays in gates and wires (except for some particular wires). Such asynchronous circuits offer high robustness but...
ASYNC
1998
IEEE
15 years 1 months ago
1998
IEEE
We describe an automated method (3D-map) for determining near-optimal decomposed generalized C-element (gC) implementations of extended burst-mode asynchronous controllers. Averag...