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» Optimizing Technology Mapping for FPGAs Using CAMs
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89
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TCAD
2008
92views more  TCAD 2008»
14 years 9 months ago
IP Watermarking Using Incremental Technology Mapping at Logic Synthesis Level
Abstract--This paper proposes an adaptive watermarking technique by modulating some closed cones in an originally optimized logic network (master design) for technology mapping. Th...
Aijiao Cui, Chip-Hong Chang, Sofiène Tahar
DATE
2008
IEEE
143views Hardware» more  DATE 2008»
15 years 4 months ago
Improving Synthesis of Compressor Trees on FPGAs via Integer Linear Programming
Multi-input addition is an important operation for many DSP and video processing applications. On FPGAs, multi-input addition has traditionally been implemented using trees of car...
Hadi Parandeh-Afshar, Philip Brisk, Paolo Ienne
86
Voted
ICCAD
1997
IEEE
95views Hardware» more  ICCAD 1997»
15 years 1 months ago
An exact solution to simultaneous technology mapping and linear placement problem
In this paper, we present an optimal algorithm for solving the simultaneous technology mapping and linear placement problem for tree-structured circuits with the objective of mini...
Jinan Lou, Amir H. Salek, Massoud Pedram
ICCAD
2001
IEEE
91views Hardware» more  ICCAD 2001»
15 years 6 months ago
A System for Synthesizing Optimized FPGA Hardware from MATLAB
Efficient high level design tools that can map behavioral descriptions to FPGA architectures are one of the key requirements to fully leverage FPGA for high throughput computatio...
Malay Haldar, Anshuman Nayak, Alok N. Choudhary, P...
FPGA
2006
ACM
131views FPGA» more  FPGA 2006»
15 years 1 months ago
Yield enhancements of design-specific FPGAs
The high unit cost of FPGA devices often deters their use beyond the prototyping stage. Efforts have been made to reduce the part-cost of FPGA devices, resulting in the developmen...
Nicola Campregher, Peter Y. K. Cheung, George A. C...