Sciweavers

173 search results - page 32 / 35
» Optimizing data flow graphs to minimize hardware implementat...
Sort
View
ANCS
2010
ACM
14 years 7 months ago
Ensemble routing for datacenter networks
: Ensemble Routing For Datacenter Networks Mike Schlansker, Yoshio Turner, Jean Tourrilhes, Alan Karp HP Laboratories HPL-2010-120 Networks, Ethernet, Multipath, Switching, Fault ...
Mike Schlansker, Yoshio Turner, Jean Tourrilhes, A...
MICRO
2008
IEEE
113views Hardware» more  MICRO 2008»
15 years 4 months ago
From SODA to scotch: The evolution of a wireless baseband processor
With the multitude of existing and upcoming wireless standards, it is becoming increasingly difficult for hardware-only baseband processing solutions to adapt to the rapidly chan...
Mark Woh, Yuan Lin, Sangwon Seo, Scott A. Mahlke, ...
FCCM
2000
IEEE
162views VLSI» more  FCCM 2000»
15 years 2 months ago
StReAm: Object-Oriented Programming of Stream Architectures Using PAM-Blox
Simplifying the programming models is paramount to the success of reconfigurable computing. We apply the principles of object-oriented programming to the design of stream archite...
Oskar Mencer, Heiko Hübert, Martin Morf, Mich...
CODES
2007
IEEE
15 years 3 months ago
Reliable multiprocessor system-on-chip synthesis
This article presents a multiprocessor system-on-chip synthesis (MPSoC) algorithm that optimizes system mean time to failure. Given a set of directed acyclic periodic graphs of co...
Changyun Zhu, Zhenyu (Peter) Gu, Robert P. Dick, L...
HPCA
2008
IEEE
15 years 10 months ago
Thread-safe dynamic binary translation using transactional memory
Dynamic binary translation (DBT) is a runtime instrumentation technique commonly used to support profiling, optimization, secure execution, and bug detection tools for application...
JaeWoong Chung, Michael Dalton, Hari Kannan, Chris...