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» Optimizing for Reduced Code Space using Genetic Algorithms
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CODES
2004
IEEE
15 years 6 months ago
Automatic synthesis of system on chip multiprocessor architectures for process networks
In this paper, we present an approach for automatic synthesis of System on Chip (SoC) multiprocessor architectures for applications expressed as process networks. Our approach is ...
Basant Kumar Dwivedi, Anshul Kumar, M. Balakrishna...
138
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TWC
2010
14 years 9 months ago
A Novel Graph-Based Suboptimal Multiuser Detector for FDM-CPM Transmissions
We consider a frequency division multiplexed (FDM) system where each user employs a continuous phase modulation (CPM), serially concatenated with an outer code through an interleav...
Amina Piemontese, Giulio Colavolpe
WCRE
2002
IEEE
15 years 7 months ago
Register Liveness Analysis for Optimizing Dynamic Binary Translation
Dynamic binary translators compile machine code from a source architecture to a target architecture at run time. Due to the hard time constraints of just-in-time compilation only ...
Mark Probst, Andreas Krall, Bernhard Scholz
139
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COMPGEOM
2005
ACM
15 years 4 months ago
Finding the best shortcut in a geometric network
Given a Euclidean graph G in Rd with n vertices and m edges we consider the problem of adding a shortcut such that the stretch factor of the resulting graph is minimized. Currentl...
Mohammad Farshi, Panos Giannopoulos, Joachim Gudmu...
122
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GECCO
2005
Springer
102views Optimization» more  GECCO 2005»
15 years 8 months ago
Latent variable crossover for k-tablet structures and its application to lens design problems
This paper presents the Real-coded Genetic Algorithms for high-dimensional ill-scaled structures, what is called, the ktablet structure. The k-tablet structure is the landscape th...
Jun Sakuma, Shigenobu Kobayashi