Sciweavers

879 search results - page 110 / 176
» Optimizing for Reduced Code Space using Genetic Algorithms
Sort
View
116
Voted
ETS
2006
IEEE
119views Hardware» more  ETS 2006»
15 years 8 months ago
On-Chip Test Generation Using Linear Subspaces
A central problem in built-in self test (BIST) is how to efficiently generate a small set of test vectors that detect all targeted faults. We propose a novel solution that uses l...
Ramashis Das, Igor L. Markov, John P. Hayes
101
Voted
LCTRTS
2004
Springer
15 years 8 months ago
Finding effective compilation sequences
Most modern compilers operate by applying a fixed, program-independent sequence of optimizations to all programs. Compiler writers choose a single “compilation sequence”, or ...
L. Almagor, Keith D. Cooper, Alexander Grosul, Tim...
ADAEUROPE
2005
Springer
15 years 8 months ago
The Application of Compile-Time Reflection to Software Fault Tolerance Using Ada 95
Transparent system support for software fault tolerance reduces performance in general and precludes application-specific optimizations in particular. In contrast, explicit support...
Patrick Rogers, Andy J. Wellings
ICRA
2000
IEEE
92views Robotics» more  ICRA 2000»
15 years 7 months ago
Action Module Planning and its Application to an Experimental Climbing Robot
This paper presents the application of an action module planning method to an experimental climbing robot named LIBRA. The method searches for a sequence of physically realizable ...
David M. Bevly, Shane Farritor, Steven Dubowsky
153
Voted
AEI
1999
134views more  AEI 1999»
15 years 2 months ago
Automatic design synthesis with artificial intelligence techniques
Design synthesis represents a highly complex task in the field of industrial design. The main difficulty in automating it is the definition of the design and performance spaces, i...
Francisco J. Vico, Francisco J. Veredas, Jos&eacut...