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» Optimizing for parallelism and data locality
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104
Voted
DATE
2005
IEEE
133views Hardware» more  DATE 2005»
15 years 6 months ago
Locality-Aware Process Scheduling for Embedded MPSoCs
Utilizing on-chip caches in embedded multiprocessorsystem-on-a-chip (MPSoC) based systems is critical from both performance and power perspectives. While most of the prior work th...
Mahmut T. Kandemir, Guilin Chen
79
Voted
ISNN
2005
Springer
15 years 6 months ago
A SIMD Neural Network Processor for Image Processing
Abstract. Artificial Neural Networks (ANNs) and image processing requires massively parallel computation of simple operator accompanied by heavy memory access. Thus, this type of ...
Dongsun Kim, Hyunsik Kim, Hongsik Kim, Gunhee Han,...
106
Voted
ICPP
1999
IEEE
15 years 5 months ago
Improving Performance of Load-Store Sequences for Transaction Processing Workloads on Multiprocessors
On-line transaction processing exhibits poor memory behavior in high-end multiprocessor servers because of complex sharing patterns and substantial interaction between the databas...
Jim Nilsson, Fredrik Dahlgren
PDIS
1994
IEEE
15 years 4 months ago
A Predicate-based Caching Scheme for Client-Server Database Architectures
We propose a new client-side data-caching scheme for relational databases with a central server and multiple clients. Data are loaded into each client cache based on queries execut...
Arthur M. Keller, Julie Basu
115
Voted
DAC
2010
ACM
15 years 4 months ago
Efficient fault simulation on many-core processors
Fault simulation is essential in test generation, design for test and reliability assessment of integrated circuits. Reliability analysis and the simulation of self-test structure...
Michael A. Kochte, Marcel Schaal, Hans-Joachim Wun...