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» Optimizing for parallelism and data locality
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135
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CORR
2007
Springer
154views Education» more  CORR 2007»
15 years 20 days ago
Application of a design space exploration tool to enhance interleaver generation
This paper presents a methodology to efficiently explore the design space of communication adapters. In most digital signal processing (DSP) applications, the overall performance ...
Cyrille Chavet, Philippe Coussy, Pascal Urard, Eri...
VLSISP
2008
106views more  VLSISP 2008»
15 years 17 days ago
Architecture Considerations for Multi-Format Programmable Video Processors
Many different video processor architectures exist. Its architecture gives a processor strength for a particular application. Hardwired logic yields the best performance/cost, but ...
Jonah Probell
104
Voted
CN
2011
111views more  CN 2011»
14 years 4 months ago
On the design of network control and management plane
We provide a design of a control and management plane for data networks using the abstraction of 4D architecture, utilizing and extending 4D’s concept of a logically centralized...
Hammad Iqbal, Taieb Znati
HPCA
2006
IEEE
15 years 6 months ago
Increasing the cache efficiency by eliminating noise
Caches are very inefficiently utilized because not all the excess data fetched into the cache, to exploit spatial locality, is utilized. We define cache utilization as the percent...
Prateek Pujara, Aneesh Aggarwal
CLUSTER
2010
IEEE
14 years 4 months ago
Middleware support for many-task computing
Many-task computing aims to bridge the gap between two computing paradigms, high throughput computing and high performance computing. Many-task computing denotes highperformance co...
Ioan Raicu, Ian T. Foster, Mike Wilde, Zhao Zhang,...