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» Optimizing memory transactions
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120
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CGO
2010
IEEE
15 years 8 months ago
Umbra: efficient and scalable memory shadowing
Shadow value tools use metadata to track properties of application data at the granularity of individual machine instructions. These tools provide effective means of monitoring an...
Qin Zhao, Derek Bruening, Saman P. Amarasinghe
163
Voted
SPAA
1995
ACM
15 years 7 months ago
Accounting for Memory Bank Contention and Delay in High-Bandwidth Multiprocessors
For years, the computation rate of processors has been much faster than the access rate of memory banks, and this divergence in speeds has been constantly increasing in recent yea...
Guy E. Blelloch, Phillip B. Gibbons, Yossi Matias,...
144
Voted
CASES
2010
ACM
15 years 1 months ago
Balancing memory and performance through selective flushing of software code caches
Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. However, the high memory demands of DBTs present an obstacle for all ...
Apala Guha, Kim M. Hazelwood, Mary Lou Soffa
ISCA
2010
IEEE
236views Hardware» more  ISCA 2010»
15 years 8 months ago
Elastic cooperative caching: an autonomous dynamically adaptive memory hierarchy for chip multiprocessors
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
Enric Herrero, José González, Ramon ...
135
Voted
ANCS
2006
ACM
15 years 7 months ago
Efficient memory utilization on network processors for deep packet inspection
Deep Packet Inspection (DPI) refers to examining both packet header and payload to look for predefined patterns, which is essential for network security, intrusion detection and c...
Piti Piyachon, Yan Luo