2703 search results - page 236 / 541 » Optimizing memory transactions |
140
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ISCAS
2003
IEEE
15 years 9 months ago
2003
IEEE
This paper presents an Integrated Framework of Design Optimization and Space Minimization (IDOM) for generating the minimum number of functional units with schedule length and mem...
119
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ISQED
2002
IEEE
15 years 9 months ago
2002
IEEE
This paper presents a hybrid BIST architecture and methods for optimizing it to test systems-on-chip in a cost effective way. The proposed self-test architecture can be implemente...
106
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IPPS
1996
IEEE
15 years 8 months ago
1996
IEEE
Minimizing communications when mapping affine loop nests onto distributed memory parallel computers has already drawn a lot of attention. This paper focuses on the next step: as i...
128
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AAAI
2000
15 years 5 months ago
2000
We present a new algorithm that reduces the space complexity of heuristic search. It is most effective for problem spaces that grow polynomially with problem size, but contain lar...
152
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BNCOD
1997
15 years 5 months ago
1997
Abstract. In this paper we present two improvements to the partitioning process: 1) A new dynamic bu er management strategy is employed to increase the average block size of I/O-tr...