2703 search results - page 276 / 541 » Optimizing memory transactions |
146
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ALGORITHMICA
2005
15 years 4 months ago
2005
An optimal prefetching and I/O scheduling algorithm L-OPT, for parallel I/O systems, using a read-once model of block references is presented. The algorithm uses knowledge of the n...
144
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ICASSP
2011
IEEE
14 years 8 months ago
2011
IEEE
To address the increasing demand for higher resolution and frame rates, processing speed (i.e. performance) and area cost need to be considered in the development of next generati...
151
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HPCA
2003
IEEE
16 years 4 months ago
2003
IEEE
Originally developed to connect processors and memories in multicomputers, prior research and design of interconnection networks have focused largely on performance. As these netw...
127
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ASPDAC
2009
ACM
15 years 10 months ago
2009
ACM
Abstract— Double patterning lithography (DPL) is in current production for memory products, and is widely viewed as inevitable for logic products at the 32nm node. DPL decomposes...
150
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CEC
2008
IEEE
15 years 10 months ago
2008
IEEE
Abstract— This paper presents a genetic algorithmic approach for finding efficient paths in directed graphs when optimizing multiple objectives. Its aim is to provide solutions...