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115
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MICRO
2009
IEEE
207views Hardware» more  MICRO 2009»
15 years 10 months ago
Extending the effectiveness of 3D-stacked DRAM caches with an adaptive multi-queue policy
3D-integration is a promising technology to help combat the “Memory Wall” in future multi-core processors. Past work has considered using 3D-stacked DRAM as a large last-level...
Gabriel H. Loh
146
Voted
DAMON
2009
Springer
15 years 10 months ago
Frequent itemset mining on graphics processors
We present two efficient Apriori implementations of Frequent Itemset Mining (FIM) that utilize new-generation graphics processing units (GPUs). Our implementations take advantage ...
Wenbin Fang, Mian Lu, Xiangye Xiao, Bingsheng He, ...
135
Voted
IWMM
2009
Springer
114views Hardware» more  IWMM 2009»
15 years 10 months ago
Scalable support for multithreaded applications on dynamic binary instrumentation systems
Dynamic binary instrumentation systems are used to inject or modify arbitrary instructions in existing binary applications; several such systems have been developed over the past ...
Kim M. Hazelwood, Greg Lueck, Robert Cohn
122
Voted
DATE
2007
IEEE
114views Hardware» more  DATE 2007»
15 years 10 months ago
Two-level microprocessor-accelerator partitioning
The integration of microprocessors and field-programmable gate array (FPGA) fabric on a single chip increases both the utility and necessity of tools that automatically move softw...
Scott Sirowy, Yonghui Wu, Stefano Lonardi, Frank V...
HPCC
2007
Springer
15 years 10 months ago
Performance Evaluation of View-Oriented Parallel Programming on Cluster of Computers
Abstract. View-Oriented Parallel Programming(VOPP) is a novel programming style based on Distributed Shared Memory, which is friendly and easy for programmers to use. In this paper...
Haifeng Shang, Jiaqi Zhang, Wenguang Chen, Weimin ...