2703 search results - page 360 / 541 » Optimizing memory transactions |
133
Voted
IPPS
1996
IEEE
15 years 8 months ago
1996
IEEE
Multiple instruction issue processors place high demands on register file bandwidth. One solution to reduce this bottleneck is the use of multiple register files. Register allocat...
123
Voted
HPCN
1994
Springer
15 years 7 months ago
1994
Springer
Abstract. High Performance Fortran (hpf) is a data-parallel Fortran for Distributed Memory Multiprocessors. Hpf provides an interesting programming model but compilers are yet to c...
153
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ASPDAC
2007
ACM
15 years 7 months ago
2007
ACM
Clock skew scheduling is a technique that intentionally introduces skews to memory elements to improve the performance of a sequential circuit. It was shown in [21] that the full ...
141
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DFT
2004
IEEE
15 years 7 months ago
2004
IEEE
This paper addresses the problem of test response compaction. In order to maximize compaction ratio, a single-output encoder based on check matrix of a (n, n1, m, 3) convolutional...
141
Voted
DCOSS
2006
Springer
15 years 7 months ago
2006
Springer
Abstract. We propose a distributed scheme called Adaptive-GroupMerge for sensor networks that, given a parameter k, approximates a geometric shape by a k-vertex polygon. The algori...