2703 search results - page 374 / 541 » Optimizing memory transactions |
109
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ICCD
2004
IEEE
16 years 16 days ago
2004
IEEE
This paper evaluates several hardware-based data prefetching techniques from an energy perspective, and explores their energy/performance tradeoffs. We present detailed simulation...
121
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IPPS
2009
IEEE
15 years 10 months ago
2009
IEEE
In this paper we explore the impact of the block shape on blocked and vectorized versions of the Sparse Matrix-Vector Multiplication (SpMV) kernel and build upon previous work by ...
162
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IPPS
2009
IEEE
15 years 10 months ago
2009
IEEE
The increasing demand for computational cycles is being met by the use of multi-core processors. Having large number of cores per node necessitates multi-core aware designs to ext...
114
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EUROPAR
2009
Springer
15 years 10 months ago
2009
Springer
The availability of large-scale computing platforms comprised of tens of thousands of multicore processors motivates the need for the next generation of highly scalable sparse line...
148
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ICMCS
2008
IEEE
15 years 10 months ago
2008
IEEE
We present an implementation of general FFTs for graphics processing units (GPUs). Unlike most existing GPU FFT implementations, we handle both complex and real data of any size t...