Sciweavers

2703 search results - page 411 / 541
» Optimizing memory transactions
Sort
View
COMPGEOM
2006
ACM
15 years 7 months ago
I/O-efficient batched union-find and its applications to terrain analysis
Despite extensive study over the last four decades and numerous applications, no I/O-efficient algorithm is known for the union-find problem. In this paper we present an I/O-effic...
Pankaj K. Agarwal, Lars Arge, Ke Yi
131
Voted
SC
1995
ACM
15 years 7 months ago
Lazy Release Consistency for Hardware-Coherent Multiprocessors
Release consistency is a widely accepted memory model for distributed shared memory systems. Eager release consistency represents the state of the art in release consistent protoc...
Leonidas I. Kontothanassis, Michael L. Scott, Rica...
169
Voted
CASES
2008
ACM
15 years 5 months ago
Efficient vectorization of SIMD programs with non-aligned and irregular data access hardware
Automatic vectorization of programs for partitioned-ALU SIMD (Single Instruction Multiple Data) processors has been difficult because of not only data dependency issues but also n...
Hoseok Chang, Wonyong Sung
134
Voted
MICRO
2008
IEEE
146views Hardware» more  MICRO 2008»
15 years 3 months ago
A small cache of large ranges: Hardware methods for efficiently searching, storing, and updating big dataflow tags
Dynamically tracking the flow of data within a microprocessor creates many new opportunities to detect and track malicious or erroneous behavior, but these schemes all rely on the...
Mohit Tiwari, Banit Agrawal, Shashidhar Mysore, Jo...
TC
2008
15 years 3 months ago
Hardware Implementation Trade-Offs of Polynomial Approximations and Interpolations
This paper examines the hardware implementation trade-offs when evaluating functions via piecewise polynomial approximations and interpolations for precisions of up to 24 bits. In ...
Dong-U Lee, Ray C. C. Cheung, Wayne Luk, John D. V...