2703 search results - page 417 / 541 » Optimizing memory transactions |
119
Voted
DAC
2000
ACM
16 years 4 months ago
2000
ACM
In this paper we describe a new hardware/software partitioning approach for embedded reconfigurable architectures consisting of a general-purpose processor (CPU), a dynamically re...
244
Voted
POPL
2007
ACM
16 years 3 months ago
2007
ACM
Reuse distance (i.e. LRU stack distance) precisely characterizes program locality and has been a basic tool for memory system research since the 1970s. However, the high cost of m...
125
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EUROSYS
2009
ACM
16 years 14 days ago
2009
ACM
The backends of today’s Internet services rely heavily on caching at various layers both to provide faster service to common requests and to reduce load on back-end components. ...
132
Voted
ICCD
2001
IEEE
16 years 9 days ago
2001
IEEE
This paper deals with low-energy code generation for a highly optimized digital signal processor designed for mobile communication applications. We present a genetic algorithm bas...
123
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HIPEAC
2009
Springer
15 years 10 months ago
2009
Springer
Developing streaming applications on heterogenous multi-processor architectures like the Cell is difficult. Currently, application developers need to know about hardware details t...