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113
Voted
DATE
2006
IEEE
95views Hardware» more  DATE 2006»
15 years 4 months ago
Dynamic data type refinement methodology for systematic performance-energy design exploration of network applications
Network applications are becoming increasingly popular in the embedded systems domain requiring high performance, which leads to high energy consumption. In networks is observed t...
Alexandros Bartzas, Stylianos Mamagkakis, Georgios...
ACSD
2003
IEEE
105views Hardware» more  ACSD 2003»
15 years 4 months ago
Detecting State Coding Conflicts in STG Unfoldings Using SAT
Abstract. The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling...
Victor Khomenko, Maciej Koutny, Alexandre Yakovlev
CLUSTER
2001
IEEE
15 years 4 months ago
Clusterfile: A Flexible Physical Layout Parallel File System
This paper presents Clusterfile, a parallel file system that provides parallel file access on a cluster of computers. Existing parallel file systems offer little control over matc...
Florin Isaila, Walter F. Tichy
FPGA
2000
ACM
128views FPGA» more  FPGA 2000»
15 years 4 months ago
Factoring large numbers with programmable hardware
The fastest known algorithms for factoring large numbers share a core sieving technique. The sieving cores find numbers that are completely factored over a prime base set raised t...
Hea Joung Kim, William H. Mangione-Smith
121
Voted
HIPC
2000
Springer
15 years 4 months ago
Improving Offset Assignment on Embedded Processors Using Transformations
Embedded systems consisting of the application program ROM, RAM, the embedded processor core and any custom hardware on a single wafer are becoming increasingly common in areas suc...
Sunil Atri, J. Ramanujam, Mahmut T. Kandemir