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» Optimizing pipelines for power and performance
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ISLPED
2006
ACM
103views Hardware» more  ISLPED 2006»
15 years 7 months ago
Low power light-weight embedded systems
Light-weight embedded systems are now gaining more popularity due to the recent technological advances in fabrication that have resulted in more powerful tiny processors with grea...
Majid Sarrafzadeh, Foad Dabiri, Roozbeh Jafari, Ta...
JEC
2006
71views more  JEC 2006»
15 years 1 months ago
Destructive-read in embedded DRAM, impact on power consumption
This paper explores power consumption for destructive-read embedded DRAM. Destructive-read DRAM is based on conventional DRAM design, but with sense amplifiers optimized for lower ...
Haakon Dybdahl, Per Gunnar Kjeldsberg, Marius Gran...
LCTRTS
2007
Springer
15 years 7 months ago
Compiler-managed partitioned data caches for low power
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlk...
SC
2004
ACM
15 years 7 months ago
Analysis and Performance Results of a Molecular Modeling Application on Merrimac
The Merrimac supercomputer uses stream processors and a highradix network to achieve high performance at low cost and low power. The stream architecture matches the capabilities o...
Mattan Erez, Jung Ho Ahn, Ankit Garg, William J. D...
ICC
2007
IEEE
185views Communications» more  ICC 2007»
15 years 8 months ago
Maximal Lifetime Rate and Power Allocation for Sensor Networks with Data Distortion Constraints
— We address a lifetime maximization problem for a single-hop wireless sensor network where multiple sensors encode and communicate their measurements of a Gaussian random source...
James C. F. Li, Subhrakanti Dey, Jamie S. Evans