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» Optimizing pipelines for power and performance
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113
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ISLPED
2006
ACM
105views Hardware» more  ISLPED 2006»
15 years 7 months ago
Reducing power through compiler-directed barrier synchronization elimination
Interprocessor synchronization, while extremely important for ensuring execution correctness, can be very costly in terms of both power and performance overheads. Unfortunately, m...
Mahmut T. Kandemir, Seung Woo Son
132
Voted
ICC
2009
IEEE
210views Communications» more  ICC 2009»
15 years 8 months ago
Multi-User Joint Subchannel and Power Resource-Allocation for Powerline Relay Networks
Abstract—This paper investigates Orthogonal FrequencyDivision Multiple-Access (OFDMA) resource-allocation schemes for two-hop relays in a home Powerline Communication (PLC) netwo...
Hao Zou, Aakanksha Chowdhery, Sumanth Jagannathan,...
HUC
2007
Springer
15 years 8 months ago
An Empirical Study of the Potential for Context-Aware Power Management
Context-aware power management (CAPM) uses context (e.g., user location) likely to be available in future ubiquitous computing environments, to effectively power manage a building...
Colin Harris, Vinny Cahill
115
Voted
COMSWARE
2006
IEEE
15 years 7 months ago
Exploiting multi-channel clustering for power efficiency in sensor networks
Sensor networks typically comprise of a number of inexpensive small devices with processing, communication and sensing abilities that collaborate to perform a common task. Sensor d...
Ashima Gupta, Chao Gui, Prasant Mohapatra
131
Voted
IWCMC
2006
ACM
15 years 7 months ago
Budgeting power: packet duplication and bit error rate reduction in wireless ad-hoc networks
In this paper we present and evaluate a new technique to lower packet-level error rates of application layer connections in wireless ad-hoc networks. In our scheme, data packets s...
Ghassen Ben Brahim, Bilal Khan