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» Optimizing pipelines for power and performance
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80
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MICRO
2010
IEEE
167views Hardware» more  MICRO 2010»
14 years 7 months ago
Erasing Core Boundaries for Robust and Configurable Performance
Single-thread performance, reliability and power efficiency are critical design challenges of future multicore systems. Although point solutions have been proposed to address thes...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Scott ...
89
Voted
IPPS
2006
IEEE
15 years 3 months ago
Pipelined broadcast on Ethernet switched clusters
We consider unicast-based pipelined broadcast schemes for clusters connected by multiple Ethernet switches. By splitting a large broadcast message into segments and broadcasting t...
Pitch Patarasuk, Ahmad Faraj, Xin Yuan
DATE
2006
IEEE
108views Hardware» more  DATE 2006»
15 years 3 months ago
Architectural and technology influence on the optimal total power consumption
In this paper, an approximated closed-form total power consumption equation for circuits working at their optimal supply and threshold voltage is presented. Comparisons of this fo...
Christian Schuster, Jean-Luc Nagel, Christian Pigu...
SIGARCH
2008
94views more  SIGARCH 2008»
14 years 9 months ago
Optimized on-chip pipelining of memory-intensive computations on the cell BE
Multiprocessors-on-chip, such as the Cell BE processor, regularly suffer from restricted bandwidth to off-chip main memory. We propose to reduce memory bandwidth requirements, and...
Christoph W. Kessler, Jörg Keller
87
Voted
GECCO
2005
Springer
232views Optimization» more  GECCO 2005»
15 years 3 months ago
A hardware pipeline for function optimization using genetic algorithms
Genetic Algorithms (GAs) are very commonly used as function optimizers, basically due to their search capability. A number of different serial and parallel versions of GA exist. ...
Malay Kumar Pakhira, Rajat K. De