2048 search results - page 171 / 410 » Optimizing pipelines for power and performance |
122
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SBCCI
2005
ACM
15 years 7 months ago
2005
ACM
Flow control mechanisms in Network-on-Chip (NoC) architectures are critical for fast packet propagation across the network and for low idling of network resources. Buffer manageme...
MICRO
2000
IEEE
15 years 6 months ago
2000
IEEE
The design and implementation of a modern microprocessor creates many reliability challenges. Designers must verify the correctness of large complex systems and construct implemen...
114
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CGO
2005
IEEE
15 years 7 months ago
2005
IEEE
The growing complexity of modern processors has made the generation of highly efficient code increasingly difficult. Manual code generation is very time consuming, but it is oft...
ISCA
2006
IEEE
15 years 8 months ago
2006
IEEE
The key to high performance in Simultaneous Multithreaded (SMT) processors lies in optimizing the distribution of shared resources to active threads. Existing resource distributio...
131
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TON
2010
15 years 8 days ago
2010
—In this paper, we investigate the maximization of the coverage time for a clustered wireless sensor network (WSN) by optimal balancing of power consumption among cluster heads (...