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» Optimizing pipelines for power and performance
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DATE
2009
IEEE
129views Hardware» more  DATE 2009»
15 years 8 months ago
Multi-domain clock skew scheduling-aware register placement to optimize clock distribution network
Multi-domain clock skew scheduling is a cost effective technique for performance improvement. However, the required wire length and area overhead due to phase shifters for realizin...
Naser MohammadZadeh, Minoo Mirsaeedi, Ali Jahanian...
CISS
2008
IEEE
15 years 8 months ago
Improved sum-rate optimization in the multiuser MIMO downlink
—We consider linear precoding and decoding in the downlink of a multiuser multiple-input, multiple-output (MIMO) system. In this scenario, the transmitter and the receivers may e...
Adam J. Tenenbaum, Raviraj S. Adve
CODES
2000
IEEE
15 years 6 months ago
Task response time optimization using cost-based operation motion
We present a technique for task response time improvement based on the concept of code motion from the software domain. Relaxed Operation Motion (ROM) is a simple yet powerful app...
Bassam Tabbara, Abdallah Tabbara, Alberto L. Sangi...
ASPDAC
2007
ACM
117views Hardware» more  ASPDAC 2007»
15 years 6 months ago
Short-Circuit Compiler Transformation: Optimizing Conditional Blocks
Abstract-- We present the short-circuit code transformation technique, intended for embedded compilers. The transformation technique optimizes conditional blocks in high-level prog...
Mohammad Ali Ghodrat, Tony Givargis, Alex Nicolau
ASAP
2006
IEEE
134views Hardware» more  ASAP 2006»
15 years 4 months ago
Buffer and register allocation for memory space optimization
In today's embedded systems, memory hierarchy is rapidly becoming a major factor in terms of power, performance and area. This is especially true for embedded multimedia appl...
Youcef Bouchebaba, Gabriela Nicolescu, El Mostapha...