The trend towards integrating multiple cores on the same die has accentuated the need for larger on-chip caches. Such large caches are constructed as a multitude of smaller cache ...
Reetuparna Das, Asit K. Mishra, Chrysostomos Nicop...
— This paper revisits and extends a general linear programming(LP) formulation to exploit multiple knobs such as multi-Lgate footprint-compatible libraries and post-layout Lgateb...
A large body of research literature has focused on improving the performance of longest prefix match IP-lookup. More recently, embedded memory based architectures have been propos...
Sailesh Kumar, Michela Becchi, Patrick Crowley, Jo...
We present new techniques for explicit constraint satisfaction in the incremental placement process. Our algorithm employs a Lagrangian Relaxation (LR) type approach in the analyt...
Sleep transistor insertion is one of today’s most promising and widely adopted solutions for controlling stand-by leakage power in nanometer circuits. Although single-cycle powe...