2048 search results - page 26 / 410 » Optimizing pipelines for power and performance |
128
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POPL
2010
ACM
15 years 11 months ago
2010
ACM
Software pipelining is a loop optimization that overlaps the execution of several iterations of a loop to expose more instruction-level parallelism. It can result in first-class p...
144
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ASPLOS
2004
ACM
15 years 7 months ago
2004
ACM
Increased integration in the form of multiple processor cores on a single die, relatively constant die sizes, shrinking power envelopes, and emerging applications create a new cha...
152
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CC
2008
Springer
15 years 3 months ago
2008
Springer
The polyhedral model provides powerful abstractions to optimize loop nests with regular accesses. Affine transformations in this model capture a complex sequence of execution-reord...
ICCD
2005
IEEE
15 years 10 months ago
2005
IEEE
The formal analysis of parallelism and pipelining is performed on an 8-bit Add-Compare-Select element of a Viterbi decoder. The results are quantified through a study of the delay...
ARITH
2005
IEEE
15 years 7 months ago
2005
IEEE
The pipelined CORDIC with linear approximation to rotation has been proposed to achieve reductions in delay, power and area; however, the schemes for rotation (multiplication) and...