2048 search results - page 29 / 410 » Optimizing pipelines for power and performance |
EUROPAR
2010
Springer
14 years 8 months ago
2010
Springer
Abstract. Current multicore computers differ in many hardware aspects. Tuning parallel applications is indispensable to achieve best performance on a particular hardware platform....
78
Voted
ASAP
2006
IEEE
15 years 3 months ago
2006
IEEE
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
IPPS
2002
IEEE
15 years 2 months ago
2002
IEEE
The size and complexity of current custom VLSI have forced the use of high-level programming languages to describe hardware, and compiler and synthesis technology bstract designs ...
58
Voted
ISCAS
2005
IEEE
15 years 3 months ago
2005
IEEE
—State-of-art implementations of pipelined ADCs can only realize a multiplying DAC (MDAC) with (2n –1) levels. However, the number of levels needed to optimize the performance ...
IPPS
1998
IEEE
15 years 1 months ago
1998
IEEE
Abstract. In this paper, we present a methodology for mapping an Embedded Signal Processing ESP application onto HPC platforms such that the throughput performance is maximized. Pr...