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» Optimizing pipelines for power and performance
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ICCAD
2003
IEEE
123views Hardware» more  ICCAD 2003»
15 years 6 months ago
Full-Chip Interconnect Power Estimation and Simulation Considering Concurrent Repeater and Flip-Flop Insertion
In this paper, we study the full-chp interconnect power modeling. ,We show that repeater,insertion is no longer sufficient to achievethe targetfrequencies specifiedhy ITRS, and de...
Weiping Liao, Lei He
GIS
2007
ACM
15 years 1 months ago
Pipelined spatial join processing for quadtree-based indexes
Spatial join is an important yet costly operation in spatial databases. In order to speed up the execution of a spatial join, the input tables are often indexed based on their spa...
Walid G. Aref
IPPS
2009
IEEE
15 years 4 months ago
On the complexity of mapping pipelined filtering services on heterogeneous platforms
In this paper, we explore the problem of mapping filtering services on large-scale heterogeneous platforms. Two important optimization criteria should be considered in such a fra...
Anne Benoit, Fanny Dufossé, Yves Robert
DAC
2002
ACM
15 years 10 months ago
Design of a high-throughput low-power IS95 Viterbi decoder
The design of high-throughput large-state Viterbi decoders relies on the use of multiple arithmetic units. The global communication channels among these parallel processors often ...
Xun Liu, Marios C. Papaefthymiou
ICDE
2010
IEEE
292views Database» more  ICDE 2010»
15 years 9 months ago
Exploring Power-Performance Tradeoffs in Database Systems
With the total energy consumption of computing systems increasing in a steep rate, much attention has been paid to the design of energy-efficient computing systems and applications...
Zichen Xu, Yi-Cheng Tu, Xiaorui Wang