High-performance and low-power VLIW DSP processors are increasingly deployed on embedded devices to process video and multimedia applications. For reducing power and cost in desig...
: This article presents an architecture that encrypts data with the AES algorithm. This architecture can be implemented on the Xilinx Virtex II FPGA family, by applying pipelining ...
Abstract. This paper discusses the state-of-the-art software optimization methodology for symmetric cryptographic primitives on Pentium III and 4 processors. We aim at maximizing s...
Current GPUs perform a significant amount of redundant shading when surfaces are tessellated into small triangles. We address this inefficiency by augmenting the GPU pipeline to...
Kayvon Fatahalian, Solomon Boulos, James Hegarty, ...
Motivated by combinatorial optimization theory, we propose an algorithmic power allocation method that minimizes the total transmitting power in transmitter diversity systems, prov...
Diomidis S. Michalopoulos, Athanasios S. Lioumpas,...