Sciweavers

2048 search results - page 63 / 410
» Optimizing pipelines for power and performance
Sort
View
ISCA
1995
IEEE
118views Hardware» more  ISCA 1995»
15 years 5 months ago
The EM-X Parallel Computer: Architecture and Basic Performance
Latency tolerance is essential in achieving high performance on parallel computers for remote function calls and fine-grained remote memory accesses. EM-X supports interprocessor ...
Yuetsu Kodama, Hirohumi Sakane, Mitsuhisa Sato, Ha...
HPDC
2002
IEEE
15 years 6 months ago
A High-Performance Cluster Storage Server
An essential building block for any Data Grid infrastructure is the storage server. In this paper we describe a high-performance cluster storage server built around the SDSC Stora...
Keith Bell, Andrew A. Chien, Mario Lauria
117
Voted
ICC
2007
IEEE
135views Communications» more  ICC 2007»
15 years 8 months ago
New Results on Single-Step Power Control System in Finite State Markov Channel: Power Control Error Modelling and Queueing Varia
— The analysis regarding the impact of the single-step power control (SSPC) scheme on the system performance such as bit error rate, packet error rate and queueing variation is h...
Shi-Yong Lee, Min-Kuan Chang
HPCA
2006
IEEE
16 years 2 months ago
CMP design space exploration subject to physical constraints
This paper explores the multi-dimensional design space for chip multiprocessors, exploring the inter-related variables of core count, pipeline depth, superscalar width, L2 cache s...
Yingmin Li, Benjamin C. Lee, David Brooks, Zhigang...
ICDCS
2006
IEEE
15 years 7 months ago
A Hierarchical Optimization Framework for Autonomic Performance Management of Distributed Computing Systems
This paper develops a scalable online optimization framework for the autonomic performance management of distributed computing systems operating in a dynamic environment to satisf...
Nagarajan Kandasamy, Sherif Abdelwahed, Mohit Khan...