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» Optimizing pipelines for power and performance
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CF
2010
ACM
15 years 6 months ago
Interval-based models for run-time DVFS orchestration in superscalar processors
We develop two simple interval-based models for dynamic superscalar processors. These models allow us to: i) predict with great accuracy performance and power consumption under va...
Georgios Keramidas, Vasileios Spiliopoulos, Stefan...
ICS
2010
Tsinghua U.
15 years 6 months ago
Streamlining GPU applications on the fly: thread divergence elimination through runtime thread-data remapping
Because of their tremendous computing power and remarkable cost efficiency, GPUs (graphic processing unit) have quickly emerged as an influential computing platform for a broad ...
Eddy Z. Zhang, Yunlian Jiang, Ziyu Guo, Xipeng She...
DCOSS
2009
Springer
15 years 8 months ago
Performance of Bulk Data Dissemination in Wireless Sensor Networks
Wireless sensor networks (WSNs) have recently gained a great deal of attention as a topic of research, with a wide range of applications being explored. Bulk data dissemination is ...
Wei Dong, Chun Chen, Xue Liu, Jiajun Bu, Yunhao Li...
HPCA
1998
IEEE
15 years 6 months ago
Performance Study of a Concurrent Multithreaded Processor
The performance of a concurrent multithreaded architectural model, called superthreading 15 , is studied in this paper. It tries to integrate optimizing compilation techniques and...
Jenn-Yuan Tsai, Zhenzhen Jiang, Eric Ness, Pen-Chu...
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FPGA
1997
ACM
149views FPGA» more  FPGA 1997»
15 years 5 months ago
Signal Processing at 250 MHz Using High-Performance FPGA's
This paper describes an application in high-performance signal processing using reconfigurable computing engines: a 250 MHz cross-correlator for radio astronomy. Experimental resu...
Brian Von Herzen