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» Optimizing pipelines for power and performance
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CASES
2008
ACM
15 years 3 months ago
StageNetSlice: a reconfigurable microarchitecture building block for resilient CMP systems
Although CMOS feature size scaling has been the source of dramatic performance gains, it has lead to mounting reliability concerns due to increasing power densities and on-chip te...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Jason ...
SENSYS
2010
ACM
14 years 11 months ago
The Jigsaw continuous sensing engine for mobile phone applications
Supporting continuous sensing applications on mobile phones is challenging because of the resource demands of long-term sensing, inference and communication algorithms. We present...
Hong Lu, Jun Yang, Zhigang Liu, Nicholas D. Lane, ...
APCCAS
2006
IEEE
271views Hardware» more  APCCAS 2006»
15 years 7 months ago
Leakage Optimized DECAP Design for FPGAs
— On-chip decoupling capacitors (Decaps) are widely used to mitigate on-chip power supply noise. At and below 100nm on-chip decaps face leakage and area overhead problems associa...
Balaji Vaidyanathan, Suresh Srinivasan, Yuan Xie, ...
CODES
2006
IEEE
15 years 5 months ago
Application specific forwarding network and instruction encoding for multi-pipe ASIPs
Small area and code size are two critical design issues in most of embedded system designs. In this paper, we tackle these issues by customizing forwarding networks and instructio...
Swarnalatha Radhakrishnan, Hui Guo, Sri Parameswar...
ICCAD
2003
IEEE
142views Hardware» more  ICCAD 2003»
15 years 10 months ago
Energy Optimization of Distributed Embedded Processors by Combined Data Compression and Functional Partitioning
Transmitting compressed data can reduce inter-processor communication traffic and create new opportunities for DVS (dynamic voltage scaling) in distributed embedded systems. Howe...
Jinfeng Liu, Pai H. Chou