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105
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HYBRID
1999
Springer
15 years 4 months ago
As Soon as Possible: Time Optimal Control for Timed Automata
In this work we tackle the following problem: given a timed automaton, and a target set F of configurations, restrict its transition relation in a systematic way so that from ever...
Eugene Asarin, Oded Maler
FPGA
2007
ACM
185views FPGA» more  FPGA 2007»
15 years 6 months ago
Power-aware FPGA logic synthesis using binary decision diagrams
Power consumption in field programmable gate arrays (FPGAs) has become an important issue as the FPGA market has grown to include mobile platforms. In this work we present a power...
Kevin Oo Tinmaung, David Howland, Russell Tessier
ISQED
2005
IEEE
76views Hardware» more  ISQED 2005»
15 years 6 months ago
Technology Mapping for Reliability Enhancement in Logic Synthesis
Abstract— Reliability enhancements are traditionally implemented through redundancies at the system level or through the use of harden-cell-designs at the circuit level. Reliabil...
Zhaojun Wo, Israel Koren
129
Voted
GECCO
2006
Springer
190views Optimization» more  GECCO 2006»
15 years 4 months ago
Design synthesis of microelectromechanical systems using genetic algorithms with component-based genotype representation
An automated design synthesis system based on a multi-objective genetic algorithm (MOGA) has been developed for the optimization of surface-micromachined MEMS devices. A hierarchi...
Ying Zhang, Raffi R. Kamalian, Alice M. Agogino, C...
114
Voted
ICCAD
1997
IEEE
142views Hardware» more  ICCAD 1997»
15 years 4 months ago
Library-less synthesis for static CMOS combinational logic circuits
Traditional synthesis techniques optimize CMOS circuits in two phases i) logic minimization and ii) library mapping phase. Typically, the structures and the sizes of the gates in ...
Sergey Gavrilov, Alexey Glebov, Satyamurthy Pullel...