867 search results - page 37 / 174 » Optimizing synthesis with metasketches |
106
Voted
GLVLSI
2008
IEEE
15 years 7 months ago
2008
IEEE
Timing optimizations during logic synthesis has become a necessary step to achieve timing closure in VLSI designs. This often involves “shortening” all paths found in the circ...
83
Voted
ICASSP
2009
IEEE
15 years 4 months ago
2009
IEEE
We provide an analysis of the algorithms necessary for the optimal use of multidimensional signal reconstruction from multichannel acquisition. Firstly, we provide computable cond...
106
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FPGA
2007
ACM
15 years 6 months ago
2007
ACM
The application-specific multiprocessor System-on-a-Chip is a promising design alternative because of its high degree of flexibility, short development time, and potentially high ...
89
Voted
ICCAD
1997
IEEE
15 years 4 months ago
1997
IEEE
Presynthesis optimizations transform a behavioral HDL description into an optimized HDL description that results in improved synthesis results. In this paper we introduce the decom...
127
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DAC
1995
ACM
15 years 4 months ago
1995
ACM
—We survey state-of-the-art optimization methods that target low power dissipation in VLSI circuits. Optimizations at the circuit, logic, architectural and system levels are cons...